Von Newmann computer architecure

               The von Neumann Computer Model( Princeton architecture)

It was proposed by mathematician and computer scientist John von Neumann. The design of a Von Neumann architecture is simpler than the more modern Harvard architecture is also a stored-program system but has one dedicated set of address and data buses for memory, and another set of address and data buses for fetching instructions.

The von Neumann Computer Model component :

1.     Memory: Storage of information (data/program)

2.     Processing Unit: Computation/Processing of Information

3.     Input: Means of getting information into the computer. e.g. keyboard, mouse

4.     Output: Means of getting information out of the computer. e.g. printer, monitor

5.     Control Unit: Makes sure that all the other parts perform their tasks correctly and at the correct time.

   

Communication Between Memory and Processing Unit :

·         Communication between memory and processing unit consists of two registers:

o    Memory Address Register (MAR).

o    Memory Data Register (MDR).

·         To read,

1.                 The address of the location is put in MAR.

2.                 The memory is enabled for a read.

3.                 The value is put in MDR by the memory.

·         To write

0.                 The address of the location is put in MAR.

1.                 The data is put in MDR.

2.                 The Write Enable signal is asserted.

3.                 The value in MDR is written to the location specified

Understanding the MAR and the MDR:

MAR stands for memory address register:
MAR is connected to address bus. It is the only way for the CPU to communicate with address bus. Tri-state buffer between MAR and the address bus prevent MAR from continuously dumping its output to the address bus. MAR can hold either an instruction address or a data address

MDR Stands for memory data register:
MDR is connected to the data bus. Data can go in both directions to and from memory, therefore, MDR can load its data from

·          the data bus (for reading data)

·         one of the CPU registers (for storing data.)

                                     

 Memory Operations

two basic operation on memory

1)    Fetch(address)

                                                    

2)    Store(address,value)

Disadvantage of Von Neuman Computer model:

The shared bus between the program memory and data memory leads to the Von Neumann bottleneck, the limited throughput (data transfer rate) between the CPU and memory compared to the amount of memory. Because program memory and data memory cannot be accessed at the same time, throughput is much smaller than the rate at which the CPU can work. This seriously limits the effective processing speed when the CPU is required to perform minimal processing on large amounts of data. The CPU is continuously forced to wait for needed data to be transferred to or from memory.

for HARVARD architecture go here


                                                                                      ....to be continued      R.P